Sliding-Window (SW) Packet Switch for Priority Switching
Description
This invention is a new class of high- performance packet switch architecture called the Sliding Window Packet Switch. Packet switching is the primary basis for internet routing and switching infrastructure.
This new patented parameter-assignment scheme allows high performance (in terms of switching bandwidth) and high packet throughput to be achieved while designing high-capacity internet routers, cloud-based data center gigabit ethernet switches or broadband access equipment.
Problem
With exponential growth of bursty data and video traffic in internet, there has been a growing demand for high performance switching chips to support high throughput performance of internet routers and data center switches. Evidently, there are hardware limitations on the scalability of these switching chips.
Solution
This invention overcomes the hardware scalability bottleneck of inherently slow memory-speed used in design of switching chips and deliver unparalleled scalability in terms of throughput-performance for high performance internet routers and cloud-based data center switches.
Value Proposition
The design of this technology offers an array of application ranging from high-performance internet switching capacities and fast memory speed.
Competitive Advantages
- Overcomes the performance and scalability bottleneck of the currently available switching chips.
- A single switching chip can support aggregate switching capacity of over 150Giga bits/second i.e., by supporting 1024 OC3 lines (of capacity 155 Mbps each).
- These switching chips can be combined to support even higher backplane switching bandwidth in Terabits/second.
- Ideal for routing and switching equipment for cloud computing infrastructure, server farm switching, high performance cloud-based data centers.
Status of Development
Accomplished design
IP Status
- U.S. and European Patent Granted #US7532635B2, EP1794944
- Licensing Available
